Although the performance of a data processor such as a microprocessor is tried to be improved by improving the frequency, since improvement in the frequency of a system bus for connecting the data processor is behind in practice, the performance is not so improved as expected under the present circumstances. Since the kinds of external devices connected to the system bus have been becoming various, the control of the external devices becomes complicated. This is one of the reasons that the performance is not so improved.
One of external device interfaces connected to the system bus is a PCMCIA interface which has been noted recently. The PCMCIA is an interface specification of an IC memory card or the like standardized by the PCMCIA (PC Memory Card International Association) as a standardization organization of an IC memory card and is also applied for an input/output specification of a modem, a LAN, and the like.
Since the setting of a wait and a bus width can be dynamically changed for a small area in the PCMCIA interface, a structure optimum for the system can be easily achieved. Under the present circumstances, however, a conventional data processor cannot sufficiently cope with the function for being able to dynamically switch the setting of the wait and the bus width of the PCMCIA interface.
On the other hand, a conventional high-performance microprocessor employs a technique of translating a virtual address used for accessing an external device into an external memory address by using a translation look-aside buffer (hereinafter, TLB). The TLB not only generates the external memory address by using the address translation information but also determines the access right and selects a cache access mode of a built-in cache memory. The access right is to specify an access permitted to each of loading and storing in accordance with an internal mode determined by a mode register built in the data processor. When there occurs an access violating the access right, an exception occurs in the data processor. The cache access modes include a write-through access and a copy back access. The access mode is switched for each TLB used for performing an address translation. The TLB in the conventional data processor performs the address translation in such a manner and executes a control in the data processor at the time of the address translation. Conventionally, there is not even awareness of employing a TLB in which the control of the external device connected with the data processor is taken into account.
As described above, in the conventional data processor, also in the case of connecting an external device having an interface such as a PCMCIA interface via a system bus with the data processor, the bus width and the wait in an access to the PCMCIA interface can be handled only fixedly. Accordingly, there is a problem that the data processor cannot sufficiently cope with the function useful for being able to dynamically switch the setting of the wait and the bus width of the PCMCIA interface. Even if the control information such as the bus width and the wait in an access to the PCMCIA interface is kept in a control register or the like in the data processor, when the necessity of changing the setting of the bus width, the wait and the like arises, the setting of the control register or the like has to be changed each time. When some settings are desired to be simultaneously used, the performance is not improved.
An object of the invention is to provide a data processor and a data processing system which allows an external device having an interface such as a PCMCIA interface capable of dynamically changing an access method to easily use the changing function during an actual operation.
The above object, including novel features of the invention will become apparent from the following description and the attached drawings.